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  cystech electronics corp. spec. no. : c465s6r issued date : 2012.12.25 revised date : page no. : 1/ 8 bss84s6r cystek product specification dual p-channel mosfet bss84s6r features ? low on-resistance ? high esd capability ? high speed switching ? low-voltage drive(-2.5v) ? pb-free package equivalent circuit outline the following characteristics apply to both tr1 and tr2 absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -50 gate-source voltage v gs 20 v continuous drain current @ t a =25 c, v gs =-5v (note 3) -170 continuous drain current @ t a =85 c, v gs =-5v (note 3) i d -120 ma pulsed drain current (notes 1, 2) i dm -800 ma t a =25 300 maximum power dissipation (note 3) t a =85 p d 160 mw operating junction and storage temperature tj, tstg -55~+150 c note : 1. pulse width limited by maximum junction temperature. 2. pulse width 300 s, duty cycle 2%. 3.surface mounted on 1 in2 copper pad of fr-4 board, t 5s. sot-363r bss84s6r tr1 tr2 bv dss -50v i d -170ma r dson @v gs =-10v, i d =-100ma 5 (typ) r dson @v gs =-5v , i d =-100ma 6 (typ) r dson @v gs =-3v , i d =-30ma 8 (typ)
cystech electronics corp. spec. no. : c465s6r issued date : 2012.12.25 revised date : page no. : 2/ 8 bss84s6r cystek product specification thermal performance parameter symbol limit unit thermal resistance, junction- to-ambient(pcb mounted) (note) rth,ja 415 c/w note : surface mounted on 1 in2 copper pad of fr-4 board, t 5s. electrical charact eristics (tj=25 c, unless otherwise noted) symbol min. typ. max. unit test conditions static bv dss -50 - - v v gs =0, i d =-250 a v gs(th) -1 -1.4 -2 v v ds =v gs , i d =-250 a i gss - - 8 v gs = 20v, v ds =0 - - 1 v ds =50v, v gs =0 i dss - - 10 a v ds =40v, v gs =0 (tj=70 c) - 5 7 v gs =-10v, i d =-100ma - 6 8.5 v gs =-5v, i d =-100ma *r ds(on) - 8 12 v gs =-3v, i d =-30ma *g fs 80 - - ms v ds =-10v, i d =-100ma dynamic ciss - 24 - coss - 4.6 - crss - 1.5 - pf v ds =-25v, v gs =0, f=1mhz t d(on) - 2.7 - t r - 3.3 - t d(off) - 7.4 - t f - 5 - ns v ds =-25v, i d =-100ma, v gs =-5v, r g =3.3 qg - 1.4 - qgs - 0.36 - qgd - 0.29 - nc v ds =-40v, i d =-170ma, v gs =-5v source-drain diode *v sd - -0.85 -1.2 v v gs =0v, i s =-130ma *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping BSS84S6R-0-T1-G sot-363 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel
cystech electronics corp. spec. no. : c465s6r issued date : 2012.12.25 revised date : page no. : 3/ 8 bss84s6r cystek product specification typical characteristics typical output characteristics 0 100 200 300 400 500 600 012345678910 -v ds , drain-source voltage(v) -i d , drain current (ma) -v gs =2.5v -v gs =3v -v gs =2v -v gs =3.5v -v gs =4v -v gs =4.5v -v gs =5v brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 4 5 6 7 8 9 10 11 12 0.001 0.01 0.1 1 -i d , drain current(a) r ds(on) , static drain-source on-state resistance() -v gs =10v -v gs =5v -v gs =3v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 0.1 0.2 0.3 0.4 0.5 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 2 4 6 8 10 12 14 16 18 20 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =-5v, i d =-100ma v gs =-10v, i d =-100ma -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance() i d =-100ma i d =-30ma
cystech electronics corp. spec. no. : c465s6r issued date : 2012.12.25 revised date : page no. : 4/ 8 bss84s6r cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 1 10 100 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) , normalized threshold voltage i d =-250 a single pulse power rating, junction to ambient (note on page 1) 0 2 4 6 8 10 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j( max) =150c t a =25c r ja =415c/w gate charge characteristics 0 2 4 6 8 10 0 0.6 1.2 1.8 2.4 3 3.6 qg, total gate charge(nc) -v gs , gate-source voltage(v) v ds =-40v i d =-170ma maximum safe operating area 0.001 0.01 0.1 1 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c, v gs =-5v, r ja =415c/w single pulse 1s r ds( on) limited maximum drain current vs junctiontemperature 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-5v, r ja =415c/w
cystech electronics corp. spec. no. : c465s6r issued date : 2012.12.25 revised date : page no. : 5/ 8 bss84s6r cystek product specification typical characteristics(cont.) typical transfer characteristics 0 50 100 150 200 250 300 350 400 450 500 0123456 -v gs , gate-source voltage(v) -i d , drain current (ma) -v ds =10v power derating curves 0 0.1 0.2 0.3 0.4 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) mounted on fr-4 board with 1 in 2 pad area single dual transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *z jc (t) 4.r ja =415 c/w
cystech electronics corp. spec. no. : c465s6r issued date : 2012.12.25 revised date : page no. : 6/ 8 bss84s6r cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c465s6r issued date : 2012.12.25 revised date : page no. : 7/ 8 bss84s6r cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c465s6r issued date : 2012.12.25 revised date : page no. : 8/ 8 bss84s6r cystek product specification sot-363 dimension pin 6. drain marking: pd xx date code 6-lead sot-363r plastic surface mounted package cystek package code: s6r style: pin 1. source1 (s1) pin 2. gate1 (g1) pin 3. drain2 (d2) pin 4. source2 (s2) pin 5. gate2 (g2) 1 (d1) millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.900 1.100 0.035 0.043 e1 2.150 2.450 0.085 0.096 a1 0.000 0.100 0.000 0.004 e 0.650 typ 0.026 typ a2 0.900 1.000 0.035 0.039 e1 1.200 1.400 0.047 0.055 b 0.150 0.350 0.006 0.014 l 0.525 ref 0.021 ref c 0.080 0.150 0.003 0.006 l1 0.260 0.460 0.010 0.018 d 2.000 2.200 0.079 0.087 0 8 0 8 e 1.150 1.350 0.045 0.053 notes : 1 .controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .


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